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Resume Title:

Senior Systems Engineer

Contact Information

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Work Experience

Experience level:

2-5 years

Profile/Cover Letter:

K.Srikanth

Career Objective

To be part of a leading Communications/DSP organization working in cutting edge technology and to excel in my career with constant learning & enhanced interaction with the best in industry.

Summary

 4.5+ years of experience in the implementation of standard based Wireless Baseband System Experience in joint optimization of the DSP algorithms for implementation friendly VLSI architectures without compromising performance excessively.

 In depth knowledge in wireless technologies such as DVB-T/H, T-DMB, IEEE802.16 (WiMAX) and Flarion FLASH OFDM System, basic knowledge of 3G-LTE.

 Sound knowledge in Wireless DSP development and validation of systems using C & Matlab.

 Strong foundational knowledge in Digital signal processing, Digital communication systems.

 Advanced skills acquired through numerous system analysis, concept developments, experiments and real-time implementations of OFDM based communication systems.

Technical Skills

• Wireless Standards: GSM, GPRS, EGDE, UMTS, WCDMA, HSPA
• Mobile Communication systems: 802.16d, Flarion Flash OFDM, 3G LTE.
• Broadcasting systems: DVB-T, DVB-H, T-DMB.
• Software Languages: Matlab, Octave, C, C++, VHDL, Shell scripting.
• Operating Systems: Linux, Windows
• Tools: MS Office, CVS (Concurrent Versions System).

Education

• M.Tech Digital Signal Processing
Indian Institute of Technology Madras, Chennai. 2002 - 2004 CGPA: 8.6/10.

• B.E Electronics & Communications
Osmania University College of Engineering, Hyderabad. 1998-2002
Percentage: 80.0%.

Professional experience

• SiRF Technology Private Ltd, Bangalore, India.
Senior System Engineer. August 2005 – till-date

• Midas Communication Technologies Private Ltd.
System Engineer. June 2004 – August 2005

• Analog Devices India Private Ltd, Bangalore, India.
Project Intern. April, 2003 - April, 2004

Project Experience

Organization: SiRF Technology India Private Ltd.
Project 1:
Title: System Evaluation and Characterization of DVB-T/H and DMB Chip.
Duration: 6 Months
Team size: 3
Role: Lead System Validation Engineer.
Project Description: DVB-T/H is a terrestrial and hand held Broadcast Standard which is used for transmitting the Video and IP data to Mobiles Using OFDM technology. In this project the taped out chip was post silicon validated for its performance and conformance with the actual fixed-point algorithm model. The Front End Processing system was checked for its figure of merit such as its stability and frequency response. Different channel models such as TU-6, Portable, Echo channel were used to evaluate the performance of the chip. Since the cost of crystal is one of the driver in terms of cost of whole system (BoM), the maximum clock offset that can be handled with a given degradation criterion was determined.

Responsibilities:
 Led the test, debug & fine-tuning effort from the algorithm side.
 The Convergence of Coarse Acquisition and fine tracking algorithms was evaluated for different Offsets.
 Designed mitigation algorithms for handling the in band CW seen by the receiver due to board design and the internal clock coupling.

Project 2:
Title: ATSC receiver design
Duration: 3 Months
Team size: 2
Role: System Design Engineer
Description: ATSC is an American Television Systems committee standard used for Digital Television transmission, it uses a Vestigial Side Band Signal for Data Transmission for high Spectral efficiency. The whole ATSC standard was studied and a basic fixed-point model for the Transmitter and Receiver was designed assuming the ideal timing and frequency reference. The Standard Uses Trellis Coded Modulation for efficient delivery of data.
Responsibilities:
 Built the RS Encoder and Decoder System for ATSC system.
 Built and analysed the Trellis Encoder and Fixed Point Trellis Decoder for the ATSC standard.

 Built basic LMS equalizer for ATSC system.

Project 3:
Title: T-DMB Receiver Design.
Duration: 3 Months
Team size: 4
Role: System Design Engineer
Description: DAB is the Korean standard for Digital Television Transmission, it was basically designed for Voice Transmission, which was later enhanced for Video Transmission, and it has different Modes to support different Delay Spread and Doppler spread requirements. It has Null Symbol and a reference symbol in the beginning of each frame used for synchronization and has a zero tailed Rate Compatible Convolutional Code having different protection profiles.

Responsibilities:
 Studied the T-DMB wireless standard and built a complete ‘C’ reference Transmitter and Receiver Module.
 Built the Zero tailing Convolutional Encoder and Viterbi decoder with all the
Protection Levels such as UEP/EEP and the optimised the fixed-point performance.
 Designed RFIC DC offset Impairment model.

Project 4:
Title: DVB-T Receiver Design.
Duration: 12 Months
Team size: 6
Role: System Design Engineer
Description: Analysis and Design of Signal Processing Algorithms for DVB-T/H.
DVB-T/H is a terrestrial and hand held Broadcast Standard, which is used for transmitting the Video and IP data to Mobiles Using OFDM technology. It uses concatenated Reed Solomon and convolution code for optimum performance and very low complexity. It has a wide range of Bandwidths that have to be supported ranging from 5Mhz, 6Mhz, 7Mhz and 8Mhz. And different FFT Modes and Guard Interval Sizes for Different deployment scenarios. It has a time slicing mechanism, which conserves the power, transmitted and places a tighter demand on Reacquisition. We have built a diversity receiver to have the best performance and a Low Power Diversity Mode where the receiver can easily switch between Single Channel to Diversity based on channel conditions maximizing performance and minimizing power consumption. Different channel models were built in 'C' to simulate the performance in different channel conditions
Responsibilities:
 Design of complete signal processing chain.
 Worked with Analog team on modeling and evaluating the effect of PLL Jitter on performance of DVB.
 Designed the whole FEC subsystem module for DVB-T/H in 'C' and evaluated its performance.
 Analyzed and Designed optimal algorithm for handling frequency selective interference.
 Analyzed the diversity gain seen by the System using Real data collected from the field.
 Designed algorithms for dynamic switching between single channel & diversity depending on channel conditions for optimal power consumption and performance.

 Built Model for PAL co channel interference and developed a Low Power Low Complexity Mitigation Mechanism.
 Worked on building a Optimal Low Complexity Scaling Mechanism for MRC combining in the case of Diversity Reception with an unbalanced Received Signal Strength.

Organization: Midas Communication Technologies Private Ltd.
Project :
Title: Design and Performance evaluation of IEEE802.16d WiMAX OFDMA.
Duration: 14 Months
Team size: 8
Role: As a Development Engineer,
Description: WiMAX is an IEEE standard developed for data delivery to both Nomadic and Mobile users with a very high spectral efficiency. It has various profiles suited for different implementation scenarios, which can be optimized for a very high spectral efficiency in Cellular Networks where there is huge interference for Cell Edge Users. The OFDMA profile was chosen as a means to deliver data to multiple users in the cell sharing the time frequency resources. We choose Turbo Code for the best link margins delivered. A Multi Cell Multi User using Hexagonal cells was built in 'C' to determine the optimal loading methodology in the cell.
Responsibilities:
 Implemented “IEEE802.16e WiMAX OFDMA (1X2) system” in ‘C’ (Transmitter & Receiver Floating point models).
 Evaluated Scheduling algorithms for optimal performance with Hybrid ARQ using turbo codes.
 Evaluated performance gains with MRC with ideal channel estimates with Convolutional codes.
 Simulated optimal Loading Schemes for options such as PUSC/ FUSC/ Band AMC for different loading conditions of the cell for a multi cell scenario.

Organization: Analog Devices India Private Ltd.

M.Tech Thesis:
Title: Implementation of iterative decoding for decoding multilevel codes for DRM.
Duration: 12 months
Description: Multi Level codes were proposed in DRM (Digital Radio Mondale) as a means for Digital Voice delivery, since they are very efficient in terms of spectral efficiency and computational complexity. The overall Complexity is proportional to the decoding complexity of sum of component codes but not their product. It allows us to create complicated code from a hierarchy of simple component codes. Multi staged Decoding was investigated as an alternative to the Complex Maximum Likelihood Decoding. Different Feedback mechanisms for multi stage decoding such as Hard Decision Decoding and Soft Decision Decoding were evaluated.
Achievement:
 Studied and implemented different decoding algorithms for Multi Level Codes in DRM.
 Calculated Asymptotic-coding gain achieved by the Multi Level Code and compared to the spectrally equivalent uncoded modulation and used as a means to verify simulation environment.
 The Optimum number of iterations required was found without compromising the performance and reducing the complexity and decoding delay requirements.
 Found optimal Feedback mechanism as the Soft Decision Feedback for a case of Rayleigh Channel.
 Simulated a modified Metric for a case of Non ideal Channel State Information available at the receiver which is the most practical case.
 Carried out Fixed-Point simulations to find the minimum memory requirement and computational complexity for DSP implementation.

Training:

• Attended a Workshop on WiMAX. held on Dec 03, 2004 organized by Ce-Wit at Chennai.
• Attended a Workshop on Evolution of WCDMA/HSDPA Technology towards Wireless Broad Band held on Nov 27, 2007.

Relevant Courses:

Signal Processing (Digital/Adaptive/Video/Image/Audio/Speech), Wireless and Mobile communication, DSP Architectures and Embedded systems, Digital IC design, Mapping Algorithm to DSP’s, Digital Modulation and Coding, and Digital Filter design, Adaptive Signal Processing.

Professional memberships

• IEEE 802.16 WiMAX forum [Technical Group]

Personal Traits:

 Excellent communication and interpersonal skills.
 Good Analytical and problem solving skills.
 Dedicated, hardworking and goal oriented.
 Well planned with clarity in thought and action.
 Optimistic and Team player.
 Well versed in coordinating teams spread in multiple locations.

Academic achievements:

• Received “DSP - UOP Scholarship” from Analog Devices during M.Tech.
• Stood First in “Engineering Common Entrance Test”.


Recent Employer:	SiRf Technology
Job Title:	Senior Systems Enginner
Start Month/Year:	04/2006
End Month/Year:	Current
City:	Bangalore
Country:	India
Description:	Desinged Physical Layer algorithms for OFDM based Wimax, DVB, DMB systems

Education & Training


Education Level:	Master's Degree
School Name:	IIT MADRAS
Major:	Digital Signal Processing
City:	Madras
Country:	India
Graduation Date:	08/04/2004
Description:	Not Specified