Board Design, High-Speed design engineer, Signal Integrity analysis, 8-bit/32-bit Micro Processors, FPGA based hardware design,SDRAM/DDR memory
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Summary
Currently I have been working with Powerwave Technologies, Hyderabad since 2.10years. My role is to design Board Level Hardware, Signal Integrity Analysis, Board Bring Up, and debugging of hardware boards.
Work Experience
I am having an experience of around 8 Years in Board Level and High-Speed Hardware Design. Experienced in all phases of new product development from the conceptual stages to high volume production release.
Educational Qualifications
B.Tech in ECE from JNT University, Hyderabad (1998-2002).
Technical Experience Summary
Good Board Level Hardware design expertise on
32-bit Microprocessors like MPC885 and Cold fire V2 Embedded MPU.
High-end FPGAs like Virtex-5 & Arria GX
Board design experience on SDR/DDR Memories, Ethernet Technologies, CPRI interface
Expertise in hardware design tools
OrCAD Capture Schematic Design tools.
Mentor Graphics DxDesigner tool
Mentor Graphics Hyper Lynx for SI analysis.
Agilent ADS design tool for Signal Integrity Analysis
Altera Quartus- tool for FPGA IO Analysis
Xilinx ISE FPGA/CPLD development tools.
Working Knowledge on LCD interface, Serial Protocols like I2C and SPI
Working knowledge on TI and Analog DSP devices
Key Projects ________________________________________
1. TRX Digital Board for OIDO (65MHz) for LTE & Wireless applications
Description OIDO architecture is designed to implement the roadmap for Remote Radio Heads, Remote Base stations, and Indoor Pico Base stations.
Role Responsible for the TRX board digital interfaces Designing, Signal Integrity Analysis, Testing & Debugging of TRX Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital board hardware. It consists of Powerful Arria 2GX family FPGA, 32-bit Micro processor, DPD, Memory and High-speed Data converters. Responsible for the SI analysis of High-speed interfaces like LVDS and CPRI (2.5Gbps).
Start Date 02/2011
Team Size 4
2. Baseband Board design for LTE Indoor PICO Base station
Description LTE PICO base station is intended for Indoor application and consists of a Transceiver board which includes both baseband and transceiver functionalities.
Role Responsible for Designing, Signal Integrity Analysis, Testing & Debugging of Baseband Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital interfaces. It consists of Powerful multi core architecture based Mindspeed System on Chip, 32-bit Micro processor (ARM architecture based), Memory and Data converters. It is having 2.5Gbps high-speed CPRI traces.
Start Date 08/2010
Team Size 6
3. TRX Digital Board for Little Kahuna for LTE & Wireless applications
Description Little Kahuna is a platform architecture designed to implement the roadmap for Remote Radio Heads, Remote Base stations, and Indoor Pico Base stations.
Role Responsible for Designing, Signal Integrity Analysis, Testing & Debugging of TRX Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital board hardware. It consists of Powerful Vetrex-5 FPGA, 32-bit Micro processor, Memory and High-speed Data converters. Involved in the SI analysis for High-speed interfaces like CPRI (2.5Gbps).
Start Date 08/2009
End Date 08/2010
Team Size 6
3. Communication Control Board for Vehicle Intercom System for Tactical Applications (VISTA)
Description
It is a compact intercom system designed for crew intercommunications & radio access in tactical vehicles. It is meant for Inter-communication between crew members of Tank and also with other Tank crew members through Radio.
Role
Designing, Testing & Debugging of PowerPC MPC885 Hardware Board.
Skills OrCAD Capture v16 for schematic design
Metrowerks Code warrior development tools for PowerPC
Contribution
Involved in the design and development of Communication Processor Card hardware. Its main functions include voice mixing, Dynamic Noise Reduction and interfacing various other devices in the system.
Client Indian Army
Start Date 03/2007
End Date 09/2008
Team Size 8
4. Subscriber Line Interface Board for EPABX
Description
The EPABX is a rugged small automatic exchange supporting 40 subscriber ports, 8 E&M trunk ports and 8 CO interface ports. It provides voice interface to router at MCP. Each Subscriber Line Interface card consists of Analog 2-Wire Interface circuitry supporting 8 telephones.
Role
Designing, Testing & Debugging of Subscriber Line Interface Card.
Skills OrCAD Capture v16 for schematic design
Zilog Code development tools for 8-bit eZ80 microcontroller.
Contribution
Involved in the design and development of Subscriber Line Interface Card hardware.
Client DRDL
Start Date 10/2006
End Date 02/2007
Team Size 3
5. Operator Console I/F Board for VCCS System
Description The VCCS is part of the Integrated Air Command and Control System (IACCS) the Automated Air Defence Direction Centers (ADDC) set up for conduct of Air operations by Indian Air Force. The Voice Communication Control System (VCCS) is a switching system that allows voice communication and control facilities among various operators within the ADDC and also between ADDC and the external elements/ agencies connected to the IACCS over the VCCS network including airborne aircraft under control.
Role Design Engineer
Skills OrCAD Capture v9.2 for schematic design
Contribution Involved in the design and development Operator Console Interface card (OCIF). Its functions include HDLC, framing and de-framing of control signaling and text messages between the Switch card and Operator Console. E1 Framer and LIU supports framing and PCM Line interface functions.
Client Indian Air Force
Start Date 08/2005
End Date 10/2006
Team Size 7
6. IFC Board for RRSPMP System
Description RRSPMP system is a complete point to multi-point secure communications system supporting voice and data applications. The system is an end-to-end solution consisting of high speed hopping Radio, VDMUX, EPAX, Router, LLM, Antenna, and Antenna rotation sub-systems. The frequency hopping radio operating in the 1.7GHz to 2GHz is a highly secure frequency hopping point to multi-point digital radio for defense communications.
Role Project Engineer
Skills OrCAD Capture v9.2 for schematic design
ISE7.1 FPGA development tools for Xilinx FPGA
ZDS-2 IDE for Zilog eZ80Acclaim series microcontrollers.
Contribution Involved in the design and development of IFC (interface card). It includes FPGA design, Firmware for Zilog eZ80f091 MCU.
Client DRDL
Start Date 01/2005
End Date 06/2005
Team Size 8
7. POTS Line Card for SDH DLC ON STM-1 RING
Description
The objective is to provide network operators with a flexible and economic access network. The equipment is capable of carrying many of the services found in todays Telecommunication Networks. In addition, SDH has the flexibility to readily accommodate new type of customer services that network operators wish to support in the future.
Role Project Engineer
Skills Foundation series software (v4.1i) for Xilinx CPLDs /FPGAs, Keil Vision2 compiler for 8-bit Atmel microcontrollers.
Contribution
My role is to design and develop glue logic (for Xilinx CPLD) and firmware for POT and CCB line cards. I was also involved in the System Level Integration and Testing with the help of NMS. Also involved in the system level testing.
Client BSNL/MTNL
Start Date 04/2004
End Date 11/2004
Team Size 10
Employer:
Powerwave Technologies
Job Title:
Senior Design Engineer
Start Month/Year:
03/2009
End Month/Year:
Current
City:
Hyderabad
Country:
India
Description:
Key Projects: ________________________________________
1. TRX Digital Board for OIDO (65MHz) for LTE & Wireless applications
Description OIDO architecture is designed to implement the roadmap for Remote Radio Heads, Remote Base stations, and Indoor Pico Base stations.
Role Responsible for the TRX board digital interfaces Designing, Signal Integrity Analysis, Testing & Debugging of TRX Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital board hardware. It consists of Powerful Arria 2GX family FPGA, 32-bit Micro processor, DPD, Memory and High-speed Data converters. Responsible for the SI analysis of High-speed interfaces like LVDS and CPRI (2.5Gbps).
Start Date 02/2011
Team Size 4
2. Baseband Board design for LTE Indoor PICO Base station
Description LTE PICO base station is intended for Indoor application and consists of a Transceiver board which includes both baseband and transceiver functionalities.
Role Responsible for Designing, Signal Integrity Analysis, Testing & Debugging of Baseband Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital interfaces. It consists of Powerful multi core architecture based Mindspeed System on Chip, 32-bit Micro processor (ARM architecture based), Memory and Data converters. It is having 2.5Gbps high-speed CPRI traces.
Start Date 08/2010
Team Size 6
3. TRX Digital Board for Little Kahuna for LTE & Wireless applications
Description Little Kahuna is a platform architecture designed to implement the roadmap for Remote Radio Heads, Remote Base stations, and Indoor Pico Base stations.
Role Responsible for Designing, Signal Integrity Analysis, Testing & Debugging of TRX Digital Board
Skills Mentor Graphics DxDesigner, Hyper Lynx simulation tools
Contribution Involved in the design and development of Transceiver digital board hardware. It consists of Powerful Vetrex-5 FPGA, 32-bit Micro processor, Memory and High-speed Data converters. Involved in the SI analysis for High-speed interfaces like CPRI (2.5Gbps).
Start Date 08/2009
End Date 08/2010
Team Size 6
