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Job Details
Posted - 23/07/2007

Principal Engineer, Audio VLSI Design Team (client - Broadcom)

Company Amboseli Professional Associates Pvt. Ltd
Job Type Full-Time Employment
Job Category Project Manager Job
Salary N/A
Location Bangalore, India
Region: South Central Asia
Education Bachelor's Degree
Work Experience 10 +
Job Reference
Details Member of Front End Audio VLSI Design team. Responsible for I/O, HIFIDAC and Rate Manager. Time line is ASAP.

Key Performance Objectives
IOP - input/output processor. Contains all the input/output interface logic. Includes I2S logic and generates pull rates to pull data through the FMM. Gets "clocks" from audio PLL and Hifidac rate-manager and uses those to create I2S/SPDIF clocks and pull rates.
Hifidac- Digital section and Analog section will be architected by analog group. Need to design both chip-level and local test suite. Work with characterization in Irvine.
MS- Micro-sequencer. Involves firmware and hardware. Uses Pico processor with rudimentary tool-set. Provides some flexibility in formatting SPDIF because this is an area that required constant changes in ADP. Need absorb new SPDIF standards like AAC-HE and WMA-Pro without any changes to MS.
SPDIFRX challenging block, similar to complexity as the hifidac. May require changes in the way to control the SPDIFRX - how to react to sample rate and input rate changes. 2 clock recovery circuits. Block will change to support multi channel HDMI and HBR in the future.
Rate manager – Own all flavors of rate manager for BU as far as implementation, Architecture owned in SJ. Tied to VCXO and hifidac.

Experience Requirements

DSP and Audio Hardware design. ASIC Design. Verilog, C/C++, Perl, Synthesis. Audio Algorithms and Analog Expertise is a plus. 10-15 years Industry experience in Audio.

Job summary: Job: Principal Engineer, Audio VLSI Design Team (client - Broadcom) India , Bangalore, South Central Asia, Amboseli Professional Associates Pvt. Ltd, category: Project Manager Job
Candidates suitable for this job: 94
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